1. Field of the Invention
The present invention relates to a means for the visual inspection of printed circuit boards. More particularly, the present invention is directed to a means allowing the visual tracing of the electrical circuitry embedded in laminated multilayer printed circuit boards.
2. The Prior Art
In the manufacture of electronic devices, such as computers, printed circuit boards are widely used to support discrete electronic components and to provide the electrical circuitry between the components. Commercial electronic computers have become more powerful since their introduction, yet they have been reduced in physical dimensions from room size to desk size. As their size has descreased and the number of inter-connections due to more powerful logic has increased, the printed circuit boards used have become denser and more complex. Today's printed circuit boards can be extremely dense, with very small geometrics and with many layers.
The printed circuit boards have a central core typically a dielectric material, such as a composite of fiber glass and a thermosetting resin such as an epoxy resin, which core has applied on at least one surface a layer of conductive material such as copper. The layer or layers of conductive material are etched or otherwise processed to provide circuits of predetermined geometrical configuration. The individual circuit boards are then laminated to form a multilayer structure having the etched metal circuitry sandwiched between dielectric layers.
In the event that the multilayer board after it has been laminated requires engineering changes such as deletion of existing internal circuitry, an operator can, by the use of suitable tools make the engineering change. However, in order to perform the engineering change, the operator must trace the circuitry embedded in the multilayer structure from one side of the board to the other in order to find the precise point in the circuitry to perform the engineering change.
A major problem exists in tracing the circuits in multilayer printed circuit boards which are interconnected, for example, by plated through holes where each of the boards in the multilayer structure have one or more circuits on each side of the board and possibly a ground plane, all of which are interconnected to other circuits in other layers in the laminated multilayer boards. Further complicating the tracing of the electrical circuitry is that in past practice, the dielectric layers of the laminated circuit boards have had incorporated therein an opaque dye which is used to aid in inspecting the quality of the circuits using optical automatic inspection systems. For example, in an article entitled "Computer-Controlled Optical Testing of High Density Printed-Circuit Boards" appearing in IBM J. Res. Develop., Vol 27, No. 1, January 1983 pp. 50-58, there is disclosed an inspection method which utilizes a computer-controlled image-detector system which determines circuit imperfections as changes of contrast in reflectivity between the circuitized copper and dielectric layers as it scans only the dielectric or only the circuitized copper portions of the laminate. In operation, the printed circuit board is illuminated by a thallium iodide, high intensity discharge lamp (570 nm). The light is delivered to the board through a fiber optic bundle which is designed to deliver a uniform light at a controlled oblique angle to form a dark field illuminator. An opaque dye is incorporated in the dielectric to provide a high visual contrast using the 570 nm light. The light reflected from the surface under inspection is translated into a video signal the level of which indicates the presence of flaws in the circuitry.
The presence of an opaque dye in the dielectric layers of the multilayer board prevents the transmission of light through these layers. An operator attempting to make an engineering change in this laminated board and tracing circuitry which extends from one side to the opposite side of the board must turn the board over to inspect the opposite side. With opaque dyed boards, the operator frequently loses his place when turning the board over to continue tracing. The loss of the operator's place in addition to being frustrating, is time consuming and thereby adds to the cost of manufacture of the multilayer printed circuit board.
It would therefore be highly advantageous that the multilayer board be transparent to visible light so that an operator tracing the electrical circuitry from one side of the board could complete the tracing without having to turn the board over and thereby avoid the risk of losing his place.
A recent advance in the manufacture of high density multilayer printed circuit boards has eliminated the need for the use of optical inspection systems of the type described above. This latest method is disclosed in U.S. Pat. No. 4,448,804 issued May 15, 1984 to W. J. Amelio at al and assigned to International Business Machines Corporation, the assignee of this invention.
In contrast to prior art processes for selectively metallizing dielectric surfaces used in the manufacture of multilayer printed circuit boards which involve the use of a thin metallic foil, wherein a photoresist is applied and imaged to create spaces where metal deposition can occur, referred to in the art as a "semi-additive" process the method disclosed in U.S. Pat. No. 4,448,804 does not employ a foil for metal deposition. In the method disclosed in U.S. Pat. No. 4,448,804 a collodial activating or seed tin/palladium layer is applied to the roughened dielectric surface and the surface is treated with a suitable photoresist. After developing the imaged resist, the exposed tin/palladium seed acts as a catalyst for electroless deposition whereupon the resist is removed to leave the exposed circuit lines. The method of U.S. Pat. No. 4,448,804 further differs from the semi-additive process in that after metal disposition has been accomplished in the semi-additive process the metal is protected by a solder mask and the resist is stripped leaving the mask on the circuit lines which were formed on a continuous metallic foil. The metallic foil is then etched and the mask removed to leave the desired circuitry.
In dielectric substrates prepared in accordance with the method of U.S. Pat. No. 4,448,804 there is no continuous metal foil on the substrate surface to block the light used to expose the photoresist. Dielectric substrates prepared in accordance with the semi-additive process contained such a foil and prevented the photoresist on the opposite side of the board from being exposed.
Multilayer printed circuit boards manufactured in accordance with the process of U.S. Pat. No. 4,448,804 are not inspected by the computer-controlled inspection system described above, as residual copper is not left between the circuit lines due to the omission of the etch step. In the method disclosed in U.S. Pat. No. 4,448,804 the resist forms a barrier to the plating solution and no shorts are formed and for this reason the presence of an opaque dye in the dielectric layer is not necessary. However, the presence of a dye or dyes which absorb ultraviolet light from 320-440 nm. is still required in the resin system used to produce the laminate as the photoresist deposited on one side of the board must be protected during exposure of the opposite side. Any bleed-through of ultraviolet radiation will cause the resist to insolubilize in area where it should be removed, thus causing non-continuous lines in the plated circuitry.
The invention of the present application provides a method for the visual inspection of the electric circuitry which has been deposited on the dielectric layers of a multilayer printed circuit board laminate in accordance with the method disclosed in U.S. Pat. No. 4,448,804 and other processes related thereto.